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The specification and externals of product are for the improvement and might be changed without previous notice
AD converter has resolution of 18 bits, sampling clock 200 KHz (Max)
Input is 16 channels (single ended), input range can be switched every 8 ch, all points can be sampled simultaneously
DA converter resolution 16 bit
Output is 4 ch, output range ± 5 V
FPGA can migrate
256 MB of memory installed
DIO (input 4 ch, output 4 ch) mounted
PCI-Express 2.0 x 1 Gen 2 (2.5 GT / s) Low Profile
| Model | APX-520 | |
| AD Circuit | Number of Input (Synchronous Sampling) |
16 |
| Sampling Clock | 200KHz (max) | |
| Resolution | 18bit | |
| Anti-aliasing Filter | 22KHz@-3dB (±10V) / 15KHz＠-3dB (±5V) | |
| Input Inpedance | 1MΩ | |
| Input Current | 5.4μA @+10V | |
| Coupling | DC coupling | |
| Input Range | 1MΩ / ±5V or ±10V | |
| Maximum Input Voltage | 1MΩ / ±16.5V | |
| DA Circuit | Output | 4ch |
| Resolution | 16bit | |
| Output Range | -5V to +5V | |
| DIO | Input | Number of Input : 4ch |
| Signal Level : LVTTL(5V Tolerant) | ||
| Output | Number of Output : 4ch | |
| Signal Level : LVTTL(+3.3V Output) | ||
| Trigger/ Clock |
Internal Clock | 1Hz to 200KHz. increments of 1Hz (*Be adjusted to settable clock) |
| External Trigger | Input in increments of AD 8ch from DI | |
| Host I/F | PCI Express2.0x１Gen2(2.5GT/s) | |
| Power Requirements | +3.3V±9%280mA +12V±8% 510mA |
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| Dimension | 168mmx69mm, Panel width： 20mm (non-projection) |
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| Weight | 110g | |
| OS | Windows | |
| Environment | Temperature： 0 to 50℃, Humidity： 35 to 85% (non-condensing) |
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| RoHS | ||
